3D silicon capacitors

IPDiA has developed a unique technology called PICS – Passive Integrated Connecting Substrate - that allows a wide range of capacitor values to be integrated on silicon. This unprecedented integration capability - up to 250nF/mm² - is the best innovation to achieve optimized Miniaturization, Reliability and Cost Saving for your design.

The Silicon High Density Capacitors can be used throughout a wide range of applications covering functions such as power supply decoupling, signal coupling, pump charging, DC/DC power conversion, etc. IPDiA's technology provides capacitance integration similar to X7R dielectrics with stability and reliability exceeding those of C0G/NP0 ceramic and tantalum capacitors.

Temperature

- Very low temperature variation (from -55 °C to 250 °C) and DC voltage drifts
- 4 temperature ranges available
  - From -55 °C to +110 °C
  - From -55 °C to +150 °C
  - From -55 °C to +200 °C
  - From -55 °C to +250 °C

Miniaturization

- Thin capacitors (down to 100 μm)
- Smaller footprint than most MLCC
- Overall smaller system module thanks to SiP integration

Reliability

- Extremely low derating
- Negligible failure rate prediction (MTTF > 400 000 years @ 85 °C)

Electrical Parameters

- Low ESL and tunable ESR
- Very low leakage current for battery operated devices
- Lower package parasitic effects due to shorter interconnections

Passive integration on Silicon

- Single component
- Component array

Assembly

- Chip on Board (COB)
- Wafer Level Chip Scale Package (WLCSP)
- Embedded
- System in Package (SiP)
- Wirebond

Packaging

- Wafer forms
- Single bar die (waffle pack)
- Embedded
- Tape & Reel

The 3D silicon capacitors product line is :

- - High stability capacitors
  - Low profile capacitors
  - High temperature capacitors
  - Xtreme temperature capacitors

Last Updated: Tuesday, 21 May 2013 19:45

3D silicon capacitors

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